Semiconductor Jobs

IonQ · Oxford

Owns the full lifecycle of electrical reliability fixes on operational trapped-ion quantum computers, from triaging and root-causing control and drive-electronics faults to designing, prototyping and retrofitting permanent solutions. Works across Operations, Science and Manufacturing on fleet-wide upgrades, standardising hardware and building telemetry to reduce downtime.

IonQ · Oxford

Architect and maintain UVM/SystemVerilog verification environments for complex FPGA designs, defining verification plans with constrained-random testing and functional coverage. Build automated regression suites and CI pipelines, collaborating with RTL engineers to debug and ensure reliable quantum control systems.

Lumai · Oxford

Own a Python-based performance and power modelling framework predicting how photonic AI hardware runs real inference workloads, giving architecture and compiler teams a shared source of truth for latency, throughput and power. Model compute engines, interconnect, memory and bridge interfaces, validate against RTL or emulation, and run benchmarks such as UL Procyon, Geekbench AI and LLMs.

Lumai · Oxford

Owns embedded software for a novel optical AI accelerator, writing Linux kernel and bare-metal device drivers, firmware for control processors, and deterministic RTOS control tasks. Leads board support package bring-up on new custom silicon revisions, debugging with JTAG, scopes and logic analysers, and sets the embedded team's coding standards and test methodology.

Renesas Electronics · Edinburgh

Owns verification of complex digital and mixed-signal ASIC designs, building SystemVerilog/UVM testbenches and running block-level to full-chip simulation, coverage and regression. Includes gate-level simulation with SDF timing annotation and mentoring junior engineers. Hybrid role with three set office days in Edinburgh.

Octagon Group · Southampton · £30,000 – £35,000 pa

Hands-on fabrication of specialist optical devices in a cleanroom, using photolithography, etching, dicing and other semiconductor processes to support development and manufacture of advanced optical components. The role splits time between the company's site and the University of Southampton's specialist fabrication facilities, working alongside experienced technicians and engineers.

Morson Edge · West Sussex · £60 – £90 ph

Deliver FPGA firmware for defence, transportation and aerospace products, covering architecture, requirements, design, verification and validation. Work alongside systems, software and hardware engineers using VHDL, SystemVerilog, C++ and tools such as ModelSim/QuestaSim, with a mix of on-site and remote working plus customer site visits.

Semtech · Sevenoaks · CA$95,000 – CA$122,000 pa

Owns new product introduction for high-speed analog and mixed-signal ICs, from concept through volume manufacturing and end-of-life. Defines DfT/DfM requirements, drives ATE test program development, PVT characterisation, ATE-to-bench correlation, yield analysis and DOE-based optimisation. Works cross-functionally with design, test, quality and operations, and mentors junior engineers.

Semtech · Sevenoaks

Designs analogue and mixed-signal subsystems for high-speed TIA and laser driver ICs supporting data rates up to 200G, taking ownership of blocks from concept through validation and volume production. Works with layout, verification and product teams on performance, power and area targets, using Cadence tools within a Stansted and Ottawa design centre.

Avanti Recruitment · Southampton · £50,000 – £80,000 pa

Hands-on role across the full FPGA development lifecycle, covering VHDL design, verification and SoC-based systems using Xilinx devices and Vivado. Work spans video/image processing, high-speed data, signal processing and embedded integration for defence and mission-critical products, with ownership of technical decisions and mentoring of junior engineers.

NVIDIA · Cambridge

Develops algorithms and optimizations for NVIDIA's LPX inference and compiler stack, building high-performance runtime and compiler components and mapping large-scale neural network workloads onto future hardware. Involves LLVM/MLIR work, graph transformations, scheduling and memory/layout optimizations, plus close codesign with hardware architects.

NVIDIA · United Kingdom

Develop algorithms and optimizations for NVIDIA's LPX inference and compiler stack, working at the intersection of large-scale systems, compilers, and deep learning. The role involves building high-performance runtime and compiler components, mapping inference workloads onto future hardware, and collaborating with hardware architects on codesign. Distinct for its focus on LLVM/MLIR-based compilation for spatial accelerators and publishing at top-tier venues.