Semiconductor Jobs

71 jobs for “Process Engineer”

Results

Lead Process Sustaining Engineer (Back End)

3 weeks ago

Pragmatic Semiconductor Durham

Lead technical efforts to sustain and improve high-volume back-end assembly processes, from wafer release on glass to outgoing quality inspection. Drive yield, quality and equipment effectiveness through root cause investigations, SPC and DOEs, supporting product transfers and the ramp to volume manufacturing alongside cross-functional teams.

Analog Design Engineering Intern (Audio)

Last week

Analog Devices Edinburgh

Join a Consumer Audio design team in Edinburgh to work on real mixed-signal IC development, from circuit architecture research and feasibility studies to transistor-level design, simulation and verification of analog blocks. You will build testbenches, analyse trade-offs around noise, distortion and power, and collaborate with layout engineers through physical implementation and design reviews.

Internship Clearance Required

Analog Design Engineering Intern (Power Management)

Last week

Analog Devices Edinburgh

Join a collaborative Edinburgh team developing low-power analog and power-management IP for highly integrated mixed-signal ICs. The intern contributes to architecture, transistor-level design, simulation and verification of DC/DC converter IP such as buck, boost and buck-boost topologies, including analog sub-circuits like error amplifiers, comparators and gate drivers. Work spans behavioural modelling, layout review and potentially laboratory silicon evaluation.

On-site Internship Clearance Required

Senior HW Engineer – Signal and Power Integrity

3 weeks ago

Lumai Oxford

Owns signal and power integrity across high-speed boards and packages, running pre-layout channel studies, post-layout SI analysis with IBIS-AMI models, and PDN impedance and DC drop work for high-current ASIC and FPGA rails. Channels span chip, package, interposer, board and optical engine, with heavy bench correlation using VNAs, TDRs and oscilloscopes to feed design rules.

Hybrid Permanent

Principal EDA Engineer

Last week

Renesas Electronics Edinburgh

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with infrastructure ownership. You will own Perforce Helix and IPLM methodologies, build Python and shell automation, and guide migration from legacy data platforms. The role spans Linux compute environments, EDA tool configuration, documentation and training across distributed semiconductor teams.

Hybrid Permanent

Principal EDA Engineer

Last week

Renesas Electronics Swindon

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with Perforce Helix and IPLM-based data management. You will develop Linux-based engineering environments, Python and shell automation, project/workspace methodologies, and migration paths from legacy platforms, while supporting EDA tool integration and training engineering teams.

Hybrid Permanent

Principal Product Characterisation Engineer (Production Test)

3 weeks ago

Pragmatic Semiconductor Cambridge

Technical leadership role owning product-level characterisation strategy, translating requirements and risks into proportionate test coverage, analysis and reporting. Leads a small team developing automated volume test solutions while hands-on with wafer-level ATE characterisation, RF/analogue test design and large-dataset analysis, presenting findings to stakeholders from project inception through production transfer.

Senior Embedded Engineer (RTOS)

5 months ago

Lumai Oxford

Owns embedded software for a novel optical AI accelerator, writing Linux kernel and bare-metal device drivers, firmware for control processors, and deterministic RTOS control tasks. Leads board support package bring-up on new custom silicon revisions, debugging with JTAG, scopes and logic analysers, and sets the embedded team's coding standards and test methodology.

Hybrid Permanent
IonQ logo

Staff Analog Mixed-Signal Design and Modelling Engineer

2 weeks ago

IonQ Oxford

Owns full-chip mixed-signal modelling and verification for cryo-CMOS ASICs used in trapped-ion quantum processors, building Verilog-A/AMS and real-number models correlated against schematic and measured silicon. Leads AMS methodology, sign-off criteria and reviews, runs Cadence AMS/Xcelium-Spectre co-simulation regressions, and mentors engineers through tape-out and bring-up.

Hybrid Clearance Required

Sr. ASIC Design Engineer, Blink/Ring ASIC Team

2 months ago

Amazon Cambridge

Architect and implement SoC designs for Blink/Ring smart home cameras and doorbells, owning the flow from RTL delivery through synthesis, power analysis and timing closure. The role also involves defining microarchitecture specs, mentoring junior engineers, and evaluating emerging IP blocks in a vertically integrated environment spanning architectural modelling to post-silicon validation.

Permanent

Manager - Analog IC Design

3 weeks ago

Semtech Bristol

Lead a Bristol team of analog IC design engineers, spanning associate to senior level, with direct oversight of performance, development and recruitment. The role is hands-on, guiding complex design work while managing project schedules, budgets and cross-functional priorities for optical communications ICs such as laser drivers, TIAs and transceivers.

Hybrid

Mainframe Technical Consultant - Mainframe AIOPS

3 months ago

Broadcom United Kingdom-Remote Location

Delivers technical consulting on IBM Mainframe AIOps and automation, covering WLM, System Automation, Omegamon, CA-Sysview, CA OPS/MVS and Netmaster. Works with sales teams on qualification, complex demos, proofs of concept and solution architecture, acting as a subject matter expert for customers and partners. Requires deep mainframe experience, European language skills and around 50% travel.

Remote Permanent

Firmware Engineer 1701

3 weeks ago

Morson Edge Edinburgh £51 – £70 ph

Develops firmware and FPGA designs for next-generation surveillance radar systems, covering requirement capture, architecture definition, design verification and integration with hardware and software. Works closely with mixed-discipline teams, mentors junior engineers and helps shape firmware processes across UK-wide delivery teams. Based on-site in Edinburgh with some travel flexibility.

On-site Clearance Required

Lead Software Engineer

17 months ago

Cadence Newcastle upon Tyne

Develops and maintains a C++ codebase for next-generation EDA tools, focusing on computational geometry, geometry manipulation and algorithmic complexity for sub-20nm IC design. Involves writing design, function and test specifications, interfacing with build and regression systems, and collaborating with a global cross-functional team.

Senior Electronics Design Engineer

2 months ago

VRS Recruitment High Wycombe £60,000 – £80,000 pa

Designs complex analogue and digital circuits for low-noise instrumentation, covering the full product lifecycle from concept to production. Works with scientists and multidisciplinary teams on verification, FMEA, PCBA testing and manufacturability, using tools such as OrCAD or Altium.

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