Semiconductor Jobs

Pragmatic Semiconductor · Durham

Lead technical efforts to sustain and improve high-volume back-end assembly processes, from wafer release on glass to outgoing quality inspection. Drive yield, quality and equipment effectiveness through root cause investigations, SPC and DOEs, supporting product transfers and the ramp to volume manufacturing alongside cross-functional teams.

Wolviston Management Services · Newton Aycliffe

Generates, verifies and releases MMIC integrated circuit layouts and mask reticle designs within a Design Services team, taking designs from concept through to mask release. Liaises with customers, engineers, programme managers and external mask manufacturers, and maintains reticle records and design archives. Uses CAD layout tools such as KLayout, L-Edit or Nazca Design.

Wolviston Management Services · Newton Aycliffe

Generates, verifies and releases MMIC integrated circuit layouts and mask reticle designs, taking them from initial concept through to mask release. Works in a Design Services team, producing mask order documentation and reticle records while liaising with engineers, programme managers, customers and external mask manufacturers.

Pragmatic Semiconductor · Durham

Drive manufacturing quality improvements across a semiconductor fab, leading the Fab Quality system, change management, audits and supplier quality programmes. Apply FMEA, SPC, MSA, 8D and root cause analysis to reduce non-conformances, while maintaining ISO 9001/14001/27001 compliance and delivering staff training.

Analog Devices · Edinburgh

Lead verification of complex mixed-signal ICs across the full development cycle, from concept and verification planning through implementation, execution and release. Develop UVM and formal testbench architectures, define coverage and closure metrics, debug gate-level simulations, and mentor junior engineers while leading IP or SoC verification efforts.

Analog Devices · Edinburgh

Join a Consumer Audio design team in Edinburgh to work on real mixed-signal IC development, from circuit architecture research and feasibility studies to transistor-level design, simulation and verification of analog blocks. You will build testbenches, analyse trade-offs around noise, distortion and power, and collaborate with layout engineers through physical implementation and design reviews.

Renesas Electronics · Edinburgh

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with infrastructure ownership. You will own Perforce Helix and IPLM methodologies, build Python and shell automation, and guide migration from legacy data platforms. The role spans Linux compute environments, EDA tool configuration, documentation and training across distributed semiconductor teams.

Renesas Electronics · Swindon

Provide technical leadership for a global engineering compute and design-data-management environment, combining hands-on CAD work with Perforce Helix and IPLM-based data management. You will develop Linux-based engineering environments, Python and shell automation, project/workspace methodologies, and migration paths from legacy platforms, while supporting EDA tool integration and training engineering teams.

Semtech · Bristol

Lead a Bristol team of analog IC design engineers, spanning associate to senior level, with direct oversight of performance, development and recruitment. The role is hands-on, guiding complex design work while managing project schedules, budgets and cross-functional priorities for optical communications ICs such as laser drivers, TIAs and transceivers.

Cambridge GaN Devices · Cambridge

Owns the planning and delivery of internal product and technology development projects plus public-funded R&D projects, supporting them from concept and requirements through to completion. Coordinates cross-functional teams, runs project reviews and status meetings, maintains documentation, handles financial reporting and budget tracking, and helps coordinate bid-writing for public-funded work. Reports directly to the VP of R&D and helps shape the project management function as the company grows.

Vacgen · East Sussex

Hands-on inspection of precision-engineered components and assemblies against drawings and specifications, using Faro Arm/CMM metrology equipment and specialised test gear. Involves investigating non-conformances, root cause analysis, and working with Production and Engineering to reduce defects in an ISO 9001 environment serving vacuum technology for science and space applications.

University of Surrey · Guildford · £38,448 – £46,970 pa

Develops and validates predictive models of source-gated and multimodal transistors on an EPSRC project, using TCAD, compact modelling, surrogate modelling or physics-informed machine learning. Works closely with experimental researchers to fit models against measured data and inform device and circuit design, producing publications and reusable simulation frameworks.

Baltic Recruitment · Wallsend · £51,000 – £53,000 pa

Lead the maintenance function at a specialist manufacturer of high-purity fused quartz and silica components, owning the PPM programme and reactive maintenance across production equipment, plant and utilities. Manage and develop a maintenance team and contractors, using MaintainX to track work orders, asset histories and reliability metrics. Drive continuous improvement through root cause analysis, Lean/TPM and budget control, with out-of-hours on-call support for critical failures.

Platform Recruitment · Coventry · £40,000 – £60,000 pa

Work across the full FPGA design cycle, from requirements analysis and specification through RTL design, implementation and verification. Define module architectures, run synthesis and timing analysis, and integrate FPGAs into target hardware, using VHDL or Verilog and leading vendor tools alongside senior engineers and system architects.

Cadence · Newcastle upon Tyne

Develops and maintains a C++ codebase for next-generation EDA tools, focusing on computational geometry, geometry manipulation and algorithmic complexity for sub-20nm IC design. Involves writing design, function and test specifications, interfacing with build and regression systems, and collaborating with a global cross-functional team.