Graphcore
Silicon Physical Design Engineer — Multiple Levels
- Bristol
- On-site
- Mid-level
- Permanent
Contribute technically to next-generation AI superchips, delivering sign-off-quality layouts in leading-edge process technologies. Work spans floorplanning, synthesis, place and route, CTS, timing analysis, physical verification and flow/tool development in Tcl and Python, collaborating closely with RTL, verification, DFT, architecture and packaging teams. Engineers are trusted to own their designs and improve flows, methodologies and infrastructure.
Tcl · Python · GDSII +7